Staff List

Dr.K.Babulu received the Ph.D. degree in VLSI from JNTUA, India.

At present he has been working as Professor in the department of ECE, UCEV, JNTUK,
Vizianagaram.

His research interests include VLSI Design, Embedded System Design, ASIC Design
and PLD design.

Member of professional bodies like IEEE, IETE and IEI.

He was involved in research projects and presented Research Papers and chaired the
technical secessions at National/International Conferences.

He published more than 50 Research papers in National and International Journals
and Conferences.

• Fpga implementation of usb transceiver macrocell interface with usb2. 0
  specifications
  K Babulu, KS Rajan
  2008 First International Conference on Emerging Trends in Engineering and …

  17 2008

• Fuzzy self-adaptive PID controller design for electric heating furnace
  K Babulu, DK Kumar
  International Journal of Engineering Inventions 1 (5), 10-21

  14 2012

• FPGA Realization of Radix-4 Booth Multiplication Algorithm for High Speed
  Arithmetic Logics
  K Babulu, G Parasuram
  International Journal of Computer Science and Information Technologies 2 (5 …

  13 2011

• A Novel Low Power and Area Efficient Carry-Lookahead Adder using Mod-GDI
  Technique
  P Kishore, PV Sridevi, K Babulu, KSP Chandra
  International Journal of Scientific and Research 4 (5), 1205-1210

  8 2015

• A Novel Low power and Area Efficient CarryLookahead Adder Using MOD-GDI
  Technique
  KSPC Pinninti Kishore , P. V. Sridevi , K. Babulu
  International Journal of Science and Research (IJSR) 4 (5), 1205-1210

  8* 2015

• Implementation and Performance Evaluation of Prefix Adders uing FPGAs
  YG K.Babulu
  IOSR Journal of VLSI and Signal Processing 1 (1), 51-57

  7 2012

• FPGA Implementation of Multi-Rate Reconfigurable Architecture with low
  complexity FIR Filters
  K Babulu, M Shaffi

  6 2012

• Low power and high speed optimized 4-bit array multiplier using MOD-GDI
  technique
  P Kishore, PV Sridevi, K Babulu
  2017 IEEE 7th International Advance Computing Conference (IACC), 487-491

  5 2017

• Energy optimization of 6T SRAM cell using low-voltage and high-performance
  inverter structures
  MM Reddy, M Sailaja, K Babulu
  International Journal of Electrical and Computer Engineering 9 (3), 1606

  4 2019

• FPGA realization of multiple fault diagnosis technique for faults in SRAM based
  FPGAs
  K Babulu, MK Kumar
  International Journal of Engineering Science and Innovative Technology …

  4 2012

• Low Power and Optimized Ripple Carry Adder and Carry Select Adder Using
  MOD-GDI Technique
  P Kishore, PV Sridevi, K Babulu
  Microelectronics, Electromagnetics and Telecommunications, 159-171

  3 2016

• Design and implementation of H/W efficient Multiplier: Reversible logic gate
  approach
  K Babulu, M Kamaraju, P Bujjibabu, K Pradeep

  3 2015

• 2015 International Conference on Communications and Signal Processing
  (ICCSP …
  Implementation of gait recognition for surveillance applications
  K Babulu, N Balaji, M Hema, A Krishnachaitanya
  Microelectronics, Electromagnetics and Telecommunications, 91-101

  2 2016

• Clocked low power high speed regenerative comparator
  NB Dastagiri, K Babulu
  2015 International Conference on Innovations in Information, Embedded and …

  2 2015

• A Novel Architecture for Scan Cell in Low Power Test Circuitry
  KB G. Rajesh Kumara
  2nd International Conference on Nanomaterials and Technologies (CNT 2014) 10 …
  2* 2015

• FPGA realization of multi channel data acquisition system using softcore embedded
  processor
  K Babulu, MM Chaitanya
  International Journal of Engineering Science and Innovative Technology …

  2 2013